NAND Gate

Logic

Outputs false only when all inputs are true (negated AND).

The NAND gate (NOT-AND) outputs 0 only when all inputs are 1. In every other case, it outputs 1. It is the negation of the AND gate, and it holds a unique distinction in digital electronics: the NAND gate is functionally complete, meaning that any Boolean function — no matter how complex — can be implemented using nothing but NAND gates. This property, combined with the fact that NAND gates are cheaper and faster to manufacture in CMOS technology than AND or OR gates, makes the NAND gate arguably the single most important building block in modern digital hardware.

Truth Table

ABA NAND B
001
011
101
110

How It Works

NAND is equivalent to NOT(A AND B). It produces the opposite result of AND for every input combination. You can think of it as asking "is it false that all inputs are on?" The output defaults to 1 and drops to 0 only in the single case where every input is high. For a two-input NAND gate, this means three of the four possible input combinations produce a 1 output, and only the (1,1) combination produces a 0.

Circuit Implementation

In CMOS technology, a two-input NAND gate requires only four transistors: two NMOS transistors in series (pull-down network) and two PMOS transistors in parallel (pull-up network). Compare this to an AND gate, which requires those same four transistors plus two more for an output inverter, totaling six. This transistor-count advantage is why NAND gates are the natural primitive in CMOS design. The propagation delay of a NAND gate is also typically shorter than that of an AND gate, because the signal does not have to pass through an additional inverter stage. In the TTL family, the 7400 quad two-input NAND gate was one of the most widely produced integrated circuits in history, and the 7400 series of logic chips was actually named after this foundational chip.

Properties

  • Functionally complete: Any Boolean function can be built using only NAND gates. This was proven by Charles Sanders Peirce in 1880 and independently by Henry Sheffer in 1913 (the NAND operation is sometimes called the Sheffer stroke).
  • NOT from NAND: Connect both inputs of a NAND gate together: A NAND A = NOT A.
  • AND from NAND: Feed two inputs through a NAND gate, then pass the result through a second NAND gate wired as a NOT: (A NAND B) NAND (A NAND B) = A AND B.
  • OR from NAND: Invert both inputs using NAND-as-NOT, then NAND the results: (A NAND A) NAND (B NAND B) = A OR B.
  • Not commutative under composition: While A NAND B = B NAND A, chaining NAND gates does not preserve commutativity in the same way that AND chains do.

Relation to Other Gates

NAND is the complement of AND, and through De Morgan's Law, A NAND B is equivalent to (NOT A) OR (NOT B). This means a NAND gate can be viewed as an OR gate with inverted inputs. This perspective is useful in circuit design when "bubble pushing" — a technique where designers move inversion circles through a schematic to convert between NAND-NAND logic and AND-OR logic representations. Any circuit drawn with AND, OR, and NOT gates can be systematically converted to use only NAND gates through a well-defined transformation process, and this NAND-only form is often more efficient in silicon.

When It's Used

NAND is the backbone of digital electronics. Entire computers can be and are built from NAND gates alone. The educational project "NAND to Tetris" (also known as the Nand2Tetris course by Noam Nisan and Shimon Schocken) teaches students to build a complete working computer starting from nothing but NAND gates, progressing through chip design, machine language, assemblers, compilers, and an operating system. NAND flash memory, the technology inside virtually all solid-state drives (SSDs), USB flash drives, and smartphone storage, is named after this gate because its memory cells are arranged in a NAND configuration where cells are connected in series. NAND flash became dominant over NOR flash for mass storage because the series arrangement allows for higher density and lower cost per bit. In FPGA (Field-Programmable Gate Array) design, lookup tables that implement arbitrary Boolean functions are ultimately built from transistor structures that behave as configurable NAND networks.

Historical Context

The logical significance of the NAND operation was first recognized by Charles Sanders Peirce in 1880, though his work was not widely known at the time. Henry Sheffer rediscovered it in 1913, demonstrating that a single binary operation (the Sheffer stroke, denoted as |) is sufficient to define all of propositional logic. This was a profound result in mathematical logic. When digital electronics emerged in the mid-twentieth century, the practical advantages of NAND gates in physical circuits aligned perfectly with their theoretical completeness, cementing their role as the preferred building block for digital systems worldwide.