Outputs true only when all inputs are false (negated OR).
The NOR gate (NOT-OR) outputs 1 only when all inputs are 0. If any input is 1, the output is 0. It is the negation of the OR gate. Like its sibling the NAND gate, the NOR gate is functionally complete, meaning any Boolean function can be implemented using NOR gates alone. The NOR gate holds a unique place in the history of space exploration: the Apollo Guidance Computer, which navigated astronauts to the Moon and back during the Apollo missions of the 1960s and 1970s, was constructed entirely from approximately 5,600 three-input NOR gates. This historical achievement demonstrates that a single gate type, properly orchestrated, can accomplish extraordinary feats of computation.
| A | B | A NOR B |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
NOR is equivalent to NOT(A OR B). It can be thought of as "neither A nor B" — the output is true only when no input is true. For a two-input NOR gate, only one of the four possible input combinations (both inputs at 0) produces a 1 output, while the other three combinations all produce 0. This makes NOR the "strictest" of the common two-input gates: it rejects the most input combinations. When extended to multiple inputs, a NOR gate outputs 1 only when every single input is 0, becoming increasingly selective as the number of inputs grows.
In CMOS technology, a two-input NOR gate requires four transistors: two PMOS transistors in series (pull-up network) and two NMOS transistors in parallel (pull-down network). This is the complement of the NAND gate's topology, where the PMOS transistors are in parallel and the NMOS transistors are in series. While both gates use four transistors, the NOR gate has a practical disadvantage: PMOS transistors in series have higher resistance than NMOS transistors in series (because holes have lower mobility than electrons in silicon). This means the pull-up network in a NOR gate is slower than the pull-up network in a NAND gate, resulting in a longer low-to-high transition time. As more inputs are added, this problem worsens because more PMOS transistors are stacked in series. This speed disadvantage is the primary reason NAND gates are preferred over NOR gates in most modern CMOS designs. In the TTL family, the 7402 chip provided four two-input NOR gates in a 14-pin package.
NOR is the dual of NAND. By De Morgan's Law, A NOR B = (NOT A) AND (NOT B), so a NOR gate can be viewed as an AND gate with both inputs inverted. Every circuit built from NAND gates has a dual circuit built from NOR gates, obtained by swapping all NAND gates for NOR gates and inverting all inputs and outputs. This duality is mathematically elegant, though in practice NAND circuits are usually preferred due to the speed advantage described above. The NOR gate's relationship to OR mirrors the NAND gate's relationship to AND: each negated gate adds the power of inversion that is necessary for functional completeness.
The most famous application of NOR gates is the Apollo Guidance Computer (AGC). Designed at the MIT Instrumentation Laboratory under the direction of Charles Stark Draper, the AGC used Fairchild Semiconductor's micrologic NOR gates exclusively. The engineers chose NOR gates because at the time (early 1960s), the three-input NOR gate was one of the most reliable and well-characterized integrated circuits available. Every logic function the AGC needed — registers, adders, memory addressing, program sequencing — was built by combining NOR gates in various configurations. This design choice also simplified testing and manufacturing, since only one type of gate module needed to be produced and verified. NOR flash memory, used for firmware storage and code execution in embedded systems, is named after this gate because its memory cells are arranged in a NOR configuration with cells connected in parallel. Unlike NAND flash, NOR flash allows random access to individual memory addresses, making it suitable for storing boot code and firmware that processors need to execute in place. NOR gates are also used in SR (Set-Reset) latches, one of the simplest memory elements in digital circuits, where two cross-coupled NOR gates store a single bit of information.
The NOR gate's moment of greatest glory came on July 20, 1969, when the Apollo 11 Lunar Module, guided by its NOR-gate computer, landed on the Moon. The AGC performed real-time navigation calculations, managed the descent engine thrust, and even handled the famous "1202 alarm" priority overflow situation — all using logic built from nothing but NOR gates. This remains one of the most compelling demonstrations that functional completeness is not merely a theoretical property but a practical engineering principle. While modern processors have moved beyond single-gate-type designs, the NOR gate's legacy in the Apollo program ensures its permanent place in computing history. For students, understanding why NOR and NAND are both universal gates, and why NAND is preferred in modern circuits while NOR was chosen for Apollo, provides valuable insight into how theoretical properties and practical engineering constraints interact in real-world design decisions.